This invention relates, in general, to dielectric isolation, including, but not limited to a method of forming dielectric isolated islands.
In general, dielectric isolation prevents the interaction between adjacent semiconductor devices formed on a single semiconductor material. Dielectric isolation is provided by forming a dielectric layer surrounding a tub in the semiconductor material. In certain applications, it is desirable to form a conductive layer along with the dielectric layer.
A method of fabricating a dielectrically isolated area including a silicide layer which is selectively doped has been used. This method, described in U.S. Pat. No. 4,839,309 comprises using a selectively doped silicide layer as a diffusion source for various active portions (collector, emitter, drain, or source) of high voltage semiconductor devices. A disadvantage of this process is that several masking steps are required to fabricate the structure. It would be desirable to reduce the number of masking steps in order to reduce the manufacturing cost. In addition, this method teaches making electrical contact to the silicide layer at the surface. This means that the silicide layer must be thick enough to readily make electrical contact to it. A thick silicide layer can be expensive to form.
Thus, in general, it would be desirable to form a conductive isolated area which can be manufactured at low cost and compatible with existing processes used to manufacture semiconductor devices.